Yiling  Zhang

Department of Electrical and  Computer Engineering

Advanced Integrated Circuits and Systems Laboratory

Tufts University 

 

 

 

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Research Courses CV Activities
10Gb/s 90nm CMOS Multipoint Imaging Receiver System for Free-Space Optical Communication

For broadband wireless links, optical signals offer several advantages in terms of data rate, power efficiency, low transceiver complexity, networking security, and unregulated bandwidths. Optical wireless systems operating at 1.3-1.5μm wavelengths are desirable as eye safety requirements allowing higher transmit power levels in this band, which favors the use of hybrid topology integrating III/V o/e devices with CMOS circuits.  Multipoint receivers with weighted-combiner circuit within the imaging receiver can effectively reduce the ambient noise and transmit power level compared to single element receivers. This receiver chip employs maximum ratio combining algorithm for multiple channels.  Each channel consists of a front-end LNA, a SNR detector and signal processing circuits. The chip is implemented with IBM 90nm CMOS technology and submitted through TAPO.

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6 Gbit/s 180nm CMOS Imaging Diversity Receiver Front-End Employing Select-Best Method

Multi-point imaging diversity receiver configurations employing select-best combination can achieve high optical gain over a wide field-of-view (FOV) and significantly reduce the effects of ambient light noise, cochannel interference and multipath distortion. This imaging receiver consists of a seven channel transimpedance amplifier (TIA) array and a select-best circuit implemented in a 180nm CMOS technology. This imaging receiver is designed for flip-chip bonding to a custom InGaAs MSM (metal-semiconductor-metal) photodetector array. The select-best circuit employs a novel winner-take-all peak detector structure and demonstrates high-speed, high-precision reception.

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750Mb/s Capacitive Feedback Transimpedance Amplifier with Automatic Gain Control for Broadband Optical Wireless Links

Optical wireless links require analog front-end receiver with wide field-of-view (large parasitic capacitance) and high dynamic range for signal acquisition/tracking. This transimpedance amplifier fabricated in 0.5um CMOS process employs a capacitive feedback configuration, with a self-biased automatic gain control (AGC) circuit. The capacitive feedback topology can desensitize the bandwidth performance to input parasitic capacitance and gain variation. On-chip automatic gain control mechanism is implemented to widen the dynamic range in order to accommodate link distance and angle variation while maintaining a stable response.

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Optical Ray Tracing Simulations

Simulations on optical wireless link model and optical ray tracing are performed using MATLAB, ZEMAX, Optica, et.  to determine the optical power distribution of multiple transmissions imaged onto the plane of the detector array. These optical simulations can provide the design requirements for the front-end receiver circuit in terms of dynamic range and sensitivity to achieve a certain BER.

 

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CMOS implementation of simplified IEEE 802.11 receiver MAC layer (Intro to VLSI course project)

The most common form of implementation of this 802.11 WLAN functionality in products and embedded mobile devices is through the use of embedded microprocessor cores. Most WLAN products have some form of microprocessor running software for the 802.11 protocol. we employed an alternate hardware implementation strategy of creating the core functionality of the 802.11 WLAN protocol directly in silicon, rather than write software to program a microprocessor. This design focus on the VLSI implementation of the basic function of IEEE 802.11 receiver MAC layer. The whole architecture includes decoder controller, frame control decoder, DID decoder, address decoder, sequence control decoder, body decoder and frame check sequence block, all of which are implemented in transistor level. Some simplifying assumptions in the specification of main functional modules were made and the data/control frame types, frame body data length, were reduced to simplify the design and simulation.

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MEMS-based micro direct methanol fuel cells

This micro direct methanol fuel cells (μDMFCs ) is a 5-cell series connection in a planar array configuration. The series path is oriented in a "flip-flop" configuration with electrical interconnections achieved by thin-film metal layers that coat the flow channels etched from silicon substrate. This configuration provides the unique advantage of small connection space and low connecting resistance. To overcome the disadvantage of "flip-flop" interconnection that reactant chambers must alternate between fuel and oxidant, an innovative reactant feeding configuration was designed, providing a uniform reactant feeder and reliable hermetic seals for a multitude of unit cavities per cell. MEMS processing was adopted to fabricate the silicon plates. The elements of reactant feeder were fabricated from PMMA and then assembled with the inner cells. Application of this μDMFC stacks as portable power sources were demonstrated with a LED and a toy motor powered by this μDMFC stacks.

 

Advanced Integrated Circuits and Systems Laboratory, Suite 2700, 200 Boston Avenue, Medford, MA 02155
Electrical and Computer Engineering, Tufts University, 161 College Avenue, Medford, MA 02155
Tel: 857-233-6369 | Email: yiling.zhang@tufts.edu

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