Anti-Logarithmic Converter

The antilogarithmic converter takes 16 bits from the output of the divider. This block mainly performs a shift operation, which is incorporated using the logarithmic shifter described above. However, we use two shifter to which operate simultaneously due to the parallel architecture. One of them generates the integral part of the output and another one generates the decimal part of the output. Simulation results are shown below:

Anti-log Converter 1 --integer part

Anti-log Converter 1 --decimal part

Anti-log Converter 2 --integer part

Anti-log Converter 2 --decimal part