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VLSI Implementation of 16-bit Nth Root Circuit  
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References:

  • Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, “Digital Integrated Circuits: A Design Perspective-2nd Edition”, Prentice Hall
  • John P. Uyemura, “Introduction to VLSI Circuits and Systems”
  • Khalid H. Abed & Raymond E. Siferd, “CMOS VLSI implementation of 16-bit Logarithm and Anti-logarithm Converters”, Proc. IEEE Midwest Symposium Circuits and Systems, Aug 1999.
  • Khalid H. Abed & Raymond E. Siferd, “CMOS VLSI implementation of a Low Power Logarithmic Converter”, IEEE Transactions on Computers, Vol. 52, No. 11, Nov 2003
  • Khalid H. Abed & Raymond E. Siferd, “VLSI Implementations of Low-Power Leading-One Detector Circuits”, SoutheastCon, 2006. Proceedings of the IEEE
  • Anantha P Chandrakasan, Samuel Sheng and Robert W. Brodersen, “Low Power CMOS Digital Design”, IEEE Journal of Solid-State Circuits, Vol. 27, No. 4, April 1992.
  • Seongmoo Heo, “A Low Power 32-bit Datapath design”, MS Thesis, MIT, August 2000.